STM8AF5268TAX
STM8AF5268TAX
SMT扩展库PCB免费打样
- 品牌名称
- ST(意法半导体)
- 商品型号
- STM8AF5268TAX
- 商品编号
- C3227070
- 商品封装
- LQFP-48(7x7)
- 包装方式
- 编带
- 商品毛重
- 1克(g)
商品参数
参数完善中
商品特性
- AEC - Q10x qualified
- 核心：
- Max fCPU: 24 MHz
- Advanced STM8A core with Harvard architecture and 3 - stage pipeline
- Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark
- 存储器：
- Program memory: 32 to 128 Kbyte Flash program; data retention 20 years at 55°C
- Data memory: up to 2 Kbyte true data EEPROM; endurance 300 key/le
- 时钟管理：
- Low - power crystal resonator oscillator with external clock input
- Internal, user - trimmable 16 MHz RC and low - power 128 kHz RC oscillators
- Clock security system with clock monitor
- 复位和电源管理：
- Wait/auto - wakeup/Halt/low - power modes with user definable clock gating
- Low consumption power - on and power - down reset
- 中断管理：
- Nested interrupt controller with 32 vectors
- Up to 37 external interrupts on 5 vectors
- 定时器：
- 2 general purpose 16 - bit timers with up to 3 CAPCOM channels each (IC, OC, PWM)
- Advanced control timer: 16 - bit, 4 CAPCOM channels, 3 complementary outputs, dead - time insertion and flexible synchronization
- 8 - bit AR basic timer with 8 - bit prescaler
- Auto - wakeup timer
- Window and independent watchdog timers
- I/O：
- Up to 68 user pins (11 high sink I/Os)
- Highly robust I/O design, immune against current injection
- 通信接口：
- High speed 1 Mbit/s CAN 2.0B interface
- USART with clock output for synchronous operation
- LIN master mode
- LINUART LIN 2.2 compliant, master/slave modes with automatic resynchronization
- SPI interface up to 10 Mbit/s or TMASTER/2
- I²C interface up to 400 Kbit/s
- 模数转换器 (ADC)：
- 10 - bit resolution, 2 LSB TUE, 1 LSB linearity and up to 16 multiplexed channels
- Operating temperature up to 150°C
- Qualification conforms to AEC - Q100 grade 0