TPS65580PWP

TPS65580是一款三路、高级D-CAP2™模式同步降压转换器，可帮助系统设计人员通过成本有效性、低组件数量和低待机电流解决方案来完成多种终端设备的电源总线调节器集。主控制环路采用高级D-CAP2™模式控制，无需外部补偿组件即可提供快速的瞬态响应，能够采用低等效串联电阻(ESR)输出电容器和超低ESR陶瓷电容器。此器件在输入电压为4.5V至18V之间时提供便捷和有效的运行。采用4.4mm×6.5mm 20引脚TSSOP(PWP)封装，并且额定温度范围为 -40°C至85°C环境温度范围。

The TPS65580 is a 1.5A/2.5A/1.5A triple synchronous step-down (buck) converter with two integrated N-channel MOSFETs for each channel. It operates using Advanced D-CAP2™ control mode. The fast transient response of Advanced D-CAP2™ control reduces the required output capacitance to meet a specific level of performance. Proprietary internal circuitry allows the use of low ESR output capacitors including ceramic and special polymer types.

The main control loop of the TPS65580 is a fixed switching frequency pulse width modulation (PWM) controller that supports a proprietary advanced D-CAP2™ mode control. Advanced D-CAP2™ mode control combines constant switching frequency with an internal compensation circuit and low external component count configuration with both low ESR and ceramic output capacitors. It is stable even with virtually no ripple at the output.

TPS65580 uses a advanced D-CAP2 mode control scheme and have a dedicated on board oscillator. The TPS65580 runs with fixed frequency of 700kHz.

The TPS65580 has an internal, 1.2ms, soft-start for each channel. When the ENx pin becomes high, an internal DAC begins ramping up the reference voltage to the PWM comparator. Smooth control of the output voltage is maintained during start up.

The TPS65580 contains a unique circuit to prevent current from being pulled from the output during startup if the output is pre-biased. When the soft-start commands a voltage higher than the pre-bias level (internal soft start becomes greater than internal feedback voltage VFB), the controller slowly activates synchronous rectification by starting the first low side FET gate driver pulses with a narrow on-time. It then increments that on-time on a cycle-by-cycle basis until it coincides with the time dictated by (1-D), where D is the duty cycle of the converter. This scheme prevents the initial sinking of the pre-biased output, and ensures that the output voltage (VOx) starts and ramps up smoothly into regulation from pre-biased startup to normal mode operation.

The output over-current protection (OCP) is implemented using a cycle-by-cycle valley detect control circuit and using HICCUP mode over current rotection. The switch current is monitored by measuring the low-side FET switch voltage between the SWx pin and PGNDx. This voltage is proportional to the switch current and the onresistance of the FET. To improve accuracy, the voltage sensing is temperature compensated.

• 高级D-CAP2™控制模式，快速瞬态响应，环路补偿无需外部部件，与陶瓷输出电容器兼容
• 宽输入电压范围：4.5V至18V
• 输出电压范围：0.76V至7.0V
• 针对低占空比应用对高效集成场效应晶体管(FET)进行了优化，对于2.5A电流为160mΩ（高侧）和130mΩ（低侧），对于1.5A电流为250mΩ（高侧）和230mΩ（低侧）
• 高初始基准精度
• 低侧RDS（接通）无损耗电流感测
• 固定1.2ms软启动
• 非吸入预偏置软启动
• 700kHz开关频率
• 逐周期过流限制控制
• 过流限制(OCL)，过压(OVP)，欠压(UVP)，欠压闭锁(UVLO)，热关断(TSD)保护
• 针对过载保护的断续定时器
• 电源正常
• 带有集成式升压P通道金属氧化物半导体(PMOS)开关的自适应栅极驱动器
• 由于热补偿rds（接通）的值为4000ppm/℃，过流保护(OCP)恒定
• 20引脚散热薄型小外形尺寸封装(HTSSOP)

• 针对广泛应用的低功耗系统中的负载点调节
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• 数字机顶盒(STB)
• DVD播放器/刻录机
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